1. Technical Field
The present invention relates to a processing circuit to which an input signal is inputted via a circuit having an external capacitor, such as a filter circuit.
2. Description of the Related Art
Conventionally, for removing noise from an input signal when the input signal is inputted to a processing circuit that is configured with an IC (Integrated Circuit), a filter circuit that includes an external capacitor is provided in an input line (or input path) between an input signal generator and the processing circuit. With such a processing circuit, a connecting wire may be detached from an input terminal of the processing circuit via which the input signal is inputted, resulting in an open fault of the input terminal. Moreover, the external capacitor of the filter circuit may be detached from the input line, resulting in an open fault of the external capacitor. Furthermore, the capacitance of the external capacitor may be lowered, resulting in a capacitance-drop fault of the external capacitor. Therefore, it is required to detect those faults occurring with the processing circuit.
One method of detecting the above-described faults is to employ two processing circuits and compare the input signals respectively inputted into the two processing circuits. However, with this method, the use of the two processing circuits makes the overall circuit configuration complicated, resulting in an increase in the manufacturing cost.
On the other hand, Japanese Unexamined Patent Application Publication No. 2012-145410 discloses another method of detecting the above-described faults. According to this method, a checking capacitor is employed for a single processing circuit to constantly check whether the external capacitor is in an open-fault condition. Specifically, the checking capacitor, which is provided outside the processing circuit, is first charged and then connected to an input terminal of the processing circuit, thereby causing electric charges to flow from the checking capacitor to the external capacitor. Further, a change in the voltage of an input line connected to the input terminal is detected; the change is caused by the flow of electric charges. Furthermore, based on the change in the voltage of the input line, it is determined whether the external capacitor is in the open-fault condition. More specifically, if the voltage of the input line is changed to reach the same level as the charge voltage of the checking capacitor, then the external capacitor is determined as being in the open-fault condition. Otherwise, the external capacitor is determined as being in a normally-connected condition.
However, with the above method disclosed in the patent document, high-frequency noise may be generated during the charging of the checking capacitance and/or during the flow of electric charges from the checking capacitance to the external capacitance.
Moreover, considering the influence of parasitic capacitance existing in the processing circuit, it is desirable to set the capacitance of the checking capacitor to be higher than the parasitic capacitance. In this case, however, the cost of the checking capacitor would be increased.
Alternatively, one may consider setting the capacitance of the checking capacitor to be lower than the parasitic capacitance and charging the checking capacitor for a plurality of times. In this case, however, it would be difficult to secure a fast checking speed.